1. Field of the Invention
The present invention relates to a method and a device for driving an AC type PDP.
A PDP (plasma display panel) is used widely for a television set or a monitor display of a computer, taking the occasion of a practical use of a color screen. Along with the widespread use, the use environment has become diversified, so a driving method for a stable display is required that is not affected by variations of the temperature and the power source voltage.
2. Description of the Prior Art
As a color display device, a surface discharge AC type PDP is commercialized. The surface discharge is a format in which display electrodes (first electrodes and second electrodes) that become anodes and cathodes in the display discharge for securing a luminance are arranged in parallel on the front or the rear substrate, and third electrodes (address electrodes) are arranged to cross the display electrode pair. There are two forms of the display electrode arrangement. In one form, a pair of display electrodes is arranged for each row of the matrix display. In the other form, the first and the second display electrodes are arranged alternately at a constant distance. In the latter case, the display electrodes except the both ends of the arrangement are related to the two neighboring row display. Regardless of the arrangement, the display electrode pair is covered with a dielectric.
In the surface discharge format PDP, an addressing is performed in which one (the second electrode) of the display electrode pair corresponding to each row is used as a scan electrode for row selection, and an address discharge is generated between the scan electrode and the address electrode. The address discharge triggers another address discharge between the display electrodes, so that a charge quantity (a wall charge quantity) in the dielectric is controlled in accordance with contents of the display. After the addressing, a sustaining voltage Vs having an alternating polarity is applied between the display electrodes. The sustaining voltage Vs satisfies the following inequality.
VfXYxe2x88x92VwXY less than Vs less than VfXYxe2x80x83xe2x80x83(1) 
VfXY is the discharge start voltage between the display electrodes.
VwXY is the wall voltage between the display electrodes.
When increasing the sustaining voltage Vs, the cell voltage (the sum of the driving voltage applied to the electrode and the wall voltage) exceeds the discharge start voltage VfXY only in cells having a predetermined wall charge, so that the surface discharge occurs along the substrate surface. If the application period is shortened, the light emission becomes continuous visually.
A discharge cell of a PDP is a binary light emission element. Therefore, a half tone is reproduced by setting an integral light emission quantity of each discharge cell in the frame period in accordance with a gradation value of the input image data. The color display is a type of a gradation display, and the display color is determined by a combination of luminance values of three primary colors. The gradation display utilizes a method of constituting one frame with plural subframes (subfields in an interlace display) having a weight of luminance, and of setting an integral light emission quantity by a combination of on and off of the light emission of each subframe. For example, one frame is divided into eight subframes having the luminance weights of 1, 2, 4, 8, 16, 32, 64 and 128, respectively so as to perform the 256-step gradation display. In general, weight of the luminance is set by the number of light emissions.
FIG. 11 is a diagram showing voltage waveforms of a general driving sequence. The reference characters X, Y and A denote the first electrode, the second electrode and the third electrode, respectively. The suffixes 1xe2x88x92n of the reference characters X and Y indicate the arrangement order of the rows corresponding to the electrodes X, Y. The suffixes 1xe2x88x92m of the reference character A indicate the arrangement order of the column corresponding to the electrode A.
The subframe period Tsf that is assigned to each subframe includes a preparation period TR for equalizing a charge distribution of the screen, an address period TA for forming the charge distribution corresponding to the display contents by applying a scanning pulse Py and an address pulse Pa, and a sustaining period TS for securing the luminance corresponding to the gradation value by applying a sustaining pulse Ps. Though the length of the preparation period TR and the address period TA is constant regardless of the luminance weight, the length of the sustaining period TS is longer for a larger luminance weight. The illustrated waveform is an example, and the amplitude, the polarity and the timing can be changed variously. A method of controlling the charge quantity by applying a ramp waveform pulse is preferable for equalizing the charge distribution.
FIG. 12 is a diagram showing driving voltage waveforms in the conventional address period.
In the address period TA, concerning the second electrode Y that is used as a scan electrode for row selection of the screen having n rows and m columns, an individual potential control is performed. After biasing all second electrodes Y to the non-selection potential Vya2 at the start point of the address period TA, the second electrode Y corresponding to the selected row i (1xe2x89xa6ixe2x89xa6n) is biased to the selected potential Vya1 temporarily (application of the scanning pulse). The illustrated row selection order is the same as the arrangement order of the row. In synchronization with the row selection, the third electrode A of the column including the selected cell that generates the address discharge among the selected row is biased to the selection potential Vaa (application of the address pulse). The third electrode A of the column including the non-selected cell is biased to the ground potential (normally, 0 volt). The first electrode X is biased to a constant potential Vxa from the start to the end of the addressing regardless of whether the row is the selected row or the non-selected row. The potential Vxa is set so that the cell voltage between the electrodes X and Y when the scanning pulse is applied to the second electrode Y is a little lower than the discharge start voltage VfXY. Thus, when an address discharge occurs between the third electrode A and the second electrode Y, the address discharge triggers another discharge between the electrodes X and Y (hereinafter, referred to as an address discharge) to occur. The address discharge is not generated between the electrodes X and Y of the non-selected cell having no trigger.
FIG. 13 is a diagram showing the structure of the conventional scanning circuit. FIG. 14 is a diagram showing a structure of a switch circuit that is called a scanning driver.
The conventional scanning circuit 780 includes plural scanning drivers 781 for binary control of the potential of each of the n second electrodes Y, and two switches (switching devices such as FETs) Q50, Q60 for switching the voltage that is applied to the scanning drivers. Each scanning driver 781 is an integrated circuit device, which is in charge of controlling the j second electrodes Y. In a typical and available scanning driver 781, j is approximately 60-120. As shown in FIG. 14, in each scanning driver 781, a pair of switches Qa, Qb is arranged for each of the j second electrodes Y. The j switches Qa are connected commonly to the power source terminal SD, and j switches Qb are connected commonly to the power source terminal SU. When the switch Qa turns on, the second electrode Y is biased to the potential of the power source terminal SD at that time. When the switch Qb is turned on, the second electrode Y is biased to the potential of the power source terminal SU at that time. The control signal from the controller is given to the switches Qa, Qb via a shift register, which works for realizing the row selection in a predetermined order. The scanning driver 781 includes diodes Da, Db that become current paths when the sustaining pulse is applied. With reference to FIG. 13, the power source terminals SU of all scanning drivers 781 are commonly connected to the switch Q50, and the power source terminals SD of all scanning drivers 781 are commonly connected to the switch Q60. The switches Q50, Q60 are provided for using the scanning driver 781 also for applying the sustaining pulse. In the address period, when the switch Q50 is turned on, the power source terminal SU is biased to the selection potential Vya1. When the switch Q60 is turned on, the power source terminal SD is biased to the non-selection potential Vya2. In the sustaining period, the switches Q50, Q60 and all switches Qa, Qb in the scanning drivers are turned off. The potentials of the power source terminals SU, SD are controlled by a sustaining circuit 790. The sustaining circuit 790 includes a switch for switching the potential of the second electrode Y between the sustaining potential Vs and the ground potential, and a power recycling circuit that performs charge and discharge of the capacitance between the first electrode X and the second electrode Y at a high speed utilizing an LC resonance.
In a PDP, the inner electrification characteristics depend on an operation temperature, and there is a difference of the electrification state between cells in accordance with a display pattern. For this reason, the conventional driving method has a problem that an addressing error can be generated easily due to an excessive or an insufficient electrification between the third electrode A and the second electrode Y. Hereinafter, this problem will be explained.
FIG. 15 is a diagram showing waveforms of the cell voltage variation in the address period of the conventional driving method. The thick solid line in the figure indicates an appropriate variation of the cell voltage (the sum of the applied voltage and the wall voltage), and the chain line indicates an inappropriate variation of the cell voltage.
Here, a cell of the k-th column in the j-th row of the selection order is noted. A display pattern is supposed in which the third electrode A corresponding to the k-th column is biased to the address potential Vaa in the period before the noted row becomes the selected row and while the selected row is i-th through (i+q)th row (i less than i+q less than j), i.e., the display data Di, k through Di+q, k of the k-th column in the i-th row through the (i+q)th row are the selected data.
If the operation temperature is appropriate, the wall voltage remains substantially at the initial value in the stage before the noted row becomes the selected row. Therefore, when the noted row becomes the selected row, so that the second electrode Yj is biased to the selection potential Vya1, and the third electrode Yk is biased to the address potential Vaa, a cell voltage (Vway1+Vaaxe2x88x92Vya1) between the electrodes A and Y exceeds the discharge threshold level VfAY, and the address discharge occurs. In the almost same time, the address discharge occurs between the electrodes X and Y, too. Because, the cell voltage between the electrodes X and Y (Vwxy1+Vxaxe2x88x92Vya1) is set to a value lower than or very close to the threshold level VfXY. The address discharge changes the wall voltage, so that a charged state is formed that is suitable for the operation in the succeeding sustaining period. In the illustrated example, the initial value of the wall voltage is zero volts, and the address discharge generates the wall voltage Vwxy2 between the electrodes X and Y.
Before the noted row becomes the selected row, even if the third electrode Ak is biased to the address potential Vaa, the discharge must not occur since the cell voltage between the electrodes A and Y in the noted row is lower than the discharge starting threshold level VFAY. However, if the ambient temperature rises or heat is accumulated along with the display, the cell temperature becomes higher than the normal temperature. Thus, the cell voltage between the electrodes A and Y becomes close to the discharge starting threshold level VfAY. In this situation, even if the cell voltage is lower than VfAY, a very small discharge can be generated so that the wall voltage between the electrodes A and Y can change. The remaining little quantity of space charge can affect the wall voltage to change. Due to the change of the wall voltage, when the noted row becomes the selected row, the cell voltage between the electrodes A and Y becomes lower than the normal value. Then, the address discharge intensity (the change of the wall voltage generated by the discharge) is reduced. Therefore, the address discharge between the electrodes X and Y that is generated by the trigger of the address discharge between the electrodes A and Y is also reduced, and the change of the wall voltage between the electrodes X and Y decreases. In this case, the wall voltage (Vwxy2xe2x80x2) between the electrodes X and Y of the cell to be lighted is insufficient. Therefore, a lighting error can be generated in the succeeding sustaining period, resulting in an irregular display. If the address discharge does not occur between the electrodes X and Y as explained above, the probability of the lighting error is increased.
In order to suppress the undesired change of the wall voltage, the difference between the non-selection potential Vya2 of the second electrode Y and the address potential Vaa of the third electrode A can be decreased. However, the difference between the selection potential Vya1 and the address potential Vaa should be sufficient for ensuring the intensity of the address discharge between the electrodes A and Y. Therefore, making the non-selection potential Vya2 close to the address potential Vaa means enlarging the difference between the selection potential Vya1 of the second electrode Y and the non-selection potential Vya2 and requires the increase of a withstand voltage of the scanning driver 781. As explained above, in the address period, the voltage corresponding to difference between the selection potential Vya1 and the non-selection potential Vya2 is applied between the power source terminal SU and the power source terminal SD of the scanning driver 781. So, the scanning driver 781 should endure this voltage. The increase of the withstand voltage of an integrated circuit bring a substantial increase of a cost of components.
The object of the present invention is to realize the addressing that is affected little by the change of the operation environment without increasing the withstand voltage of a circuit component, so that the display can be stabilized.
In the present invention, each scan electrode (a second electrode Y) is set to a variable potential state in a part of the address period so that the selected and the non-selected can be distinguished, while it is set to a constant potential state in the remained period so that the potential is not switched. When the potential is not switched, one of the power source terminals of the scanning driver is opened or is maintained at a potential that is the same as or close to the potential of the other power source terminal, so that the limit of the withstand voltage of the scanning driver. Thus, the potential of the scan electrode can be set to any value without worrying about the enlargement of the difference between the potential of the scan electrode and the selection potential Vya1. By making the set potential close to the address potential Vaa of the address electrode (the third electrode A), the cell voltage between the electrodes A and Y can be maintained within the range sufficiently lower than the discharge starting threshold level VfAY. Thus, the undesired change of the wall voltage that is a conventional problem can be hardly generated. Particularly, it is effective to assign a constant potential period before applying the scanning pulse to the noted scan electrode. If the constant potential period is assigned to both before and after applying the scanning pulse, the addressing can be ensured more.
In the period of the variable potential state, an undesired change of the wall voltage can be generated depending on the value of the non-selection potential Vya2. However, since there is a correlation between the change quantity and the period length, the influence of the wall voltage change is little if the period of the variable potential state is short. For example, the address period is divided into the first half and the second half, and the scan electrode that is selected in the second half is maintained at a constant potential, the influence of the wall voltage change becomes approximately a half of that in the conventional driving method.
According to a first aspect of the present invention, a method for driving an AC type PDP is provided. The AC type PDP has a screen including first electrode and second electrodes making electrode pairs for surface discharges of plural rows, and third electrodes of plural columns, each third electrode crossing the electrode pairs. The driving method comprises the steps of biasing the second electrode of a selected row to a selection potential Vya1 for row selection, biasing the third electrode of a selected column to an address potential Vaa that is different from the selection potential Vya1 in synchronization with the row selection so that an addressing discharge can occur, dividing an address period for the addressing into plural subperiods, so that different rows are selected for subperiods, switching the bias of the second electrode of the row selected in each subperiod between the selection potential Vya1 and the first non-selection potential Vya2 in accordance with selection and non-selection, and maintaining the potential of the second electrode of the row to be selected in the succeeding subperiod at a second non-selection potential Vya3 that is closer to the address potential Vaa than to the first non-selection potential Vya2.
According to a second aspect of the present invention, in the driving method, the second electrode of the row that was selected in the previous subperiod is also maintained at the second non-selection potential Vya3 in each subperiod.
According to a third aspect of the present invention, in the driving method, the second non-selection potential Vya3 is the ground potential.
According to a fourth aspect of the present invention, in the driving method, the row selection is performed in the order that is different from the arrangement order of the rows.
According to a fifth aspect of the present invention, in the driving method, the address period is divided into two subperiods. In one of the subperiods the bias of the second electrode of the odd row is switched in accordance with selection and non-selection while the second electrode of the even row is maintained at the second non-selection potential Vya3. In the other of the subperiods, the bias of the second electrode of the even row is switched in accordance with selection and non-selection while the second electrode of the odd row is maintained at the second non-selection potential Vya3.
According to a sixth aspect of the present invention, a device for driving an AC type PDP is provided. The AC type PDP has a screen including first electrode and second electrodes making electrode pairs for surface discharges of plural rows, and third electrodes of plural columns, each third electrode crossing the electrode pairs. The device biases the second electrode of a selected row to a selection potential Vya1 for row selection and biases the third electrode of a selected column to an address potential Vaa that is different from the selection potential Vya1 in synchronization with the row selection so that an addressing discharge can occur. When dividing an address period for the addressing into plural subperiods, the device switches the bias of the second electrode of the row selected in each subperiod between the selection potential Vya1 and the first non-selection potential Vya2 in accordance with selection and non-selection while maintaining the potential of the second electrode of the row to be selected in the succeeding subperiod at a second non-selection potential Vya3 that is closer to the address potential Vaa than to the first non-selection potential Vya2.
According to a seventh aspect of the present invention, the driving device comprises a switch circuit including a first and a second bias terminals for connecting a second electrode to one of the first and second bias terminals, a first switch for controlling continuity between the first bias terminal and a selection potential line, a second switch for controlling continuity between the second bias terminal and the first non-selection potential line, a third switch for controlling continuity between the second bias terminal and the second non-selection potential line, and a controller for opening the third switch in the subperiod while a bias of the second electrode is switched between the selection potential Vya1 and the first non-selection potential Vya2, and for opening the first switch in the subperiod while the potential of the second electrode is maintained at the second non-selection potential Vya3.
According to an eighth aspect of the present invention, in the driving device, a withstand voltage between the first and the second bias terminals of the switch circuit is higher than the potential difference between the selection potential Vya1 and the first non-selection potential Vya2 and is lower than the potential difference between the selection potential Vya1 and the second non-selection potential Vya3.
According to a ninth aspect of the present invention, in the driving device, the switch circuit is an integrated circuit having plural switching devices for connecting each of the plural second electrode to one of the first and the second bias terminals.
According to a tenth aspect of the present invention, in the driving device, the number of rows selected in each subperiod is equal to the number of driving electrodes per one switch circuit.
According to an eleventh aspect of the present invention, in the driving device, the number of rows selected in each subperiod is an integral multiple of the number of driving electrodes per one switch circuit.
According to a twelfth aspect of the present invention, a display device is provided that comprises the driving device of the sixth aspect and an AC type PDP that is driven by the driving device.